Author: Peter M. Maurer

EMail: Peter_Maurer@Baylor.edu

Abstract:

A method for determining the symmetries of the inputs of a logic gate either from its truth table or from facts obtained by inspection of its circuit is presented. The symmetry rule of a gate with n inputs is defined in terms of a subgroup of the symmetric group of degree n. This technique leads to an expanded and more complete definition of partial symmetry than has previously appeared. This definition of symmetry is used to show that the set of boolean expressions that represent non-totally-symmetric functions is NP-complete. The group-theoretic concept of conjugate sets is used to identify symmetry rules that are fundamentally the same but applied to different sets of inputs. A complete analysis of all forms of symmetry for 2-input, 3-input and 4-input gates is provided. An example is given to show how this theory was applied to a problem in VLSI design verification.

Date: Ancient

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